搜索资源列表
FIR_1
- FIR滤波器的verilog实现，实现6级流水线的程序设计。-FIR filter Verilog, has implemented six lines of program design.
two_d_fir
- FIR FILTER verilog code-FIR FILTER Verilog code
firISPdesign
- fir ISP design fir VHDL VHDL编程滤波的硬件描述语言实现，包括VHDL语言和verilog语言-fir fir VHDL design ISP programming VHDL hardware descr iption of the filter language , including the VHDL language and verilog
fir_finall
- 用verilog编写的fir滤波器程序，开发环境可以用ise quartus或active hdl等-verilog prepared with the fir filter process development environment can be used ise quartus or other active hdl
FIR_filter_DA_machine
- 用verilog 代码编写的179阶FIR数字滤波器，采用分布式算法实现-verilog code used to prepare the 179 band FIR digital filters, using Distributed Algorithms
fir2
- Verilog 编写的fir滤波器，可以实现fir滤波器的功能-Verilog prepared by the fir filter can achieve fir filter function
8stepSymmetryCoefficientFilter
- 8阶对称系数并行FIR滤波器(verilog)用作数字滤波，系数可调。根据实际截止频率决定。
fpga
- fpga功能实现有限字长响应FIR 用verilog编写
FIR_verilog
- 基于verilog的FIR滤波器，有两种实现方法，分别给出仿真波形
suAra6Rm
- fir滤波器的Verilog程序,看看吧，还不错！
fir_using_FPGA
- 基于verilog的fir滤波，并带matlab仿真
DDC.rar
- 个DDC使用的级联滤波器，结构CIC6+CFIR+PFIR,DDC using a cascade filter, the structure of CIC6+ CFIR+ PFIR
verilogFIR
- 本源码为Verilog的FIR数字滤波器 测试后性能很不错的-The source of the FIR digital filter for the Verilog test performance is very good
atribute_fir
- 分布式的FIR的verilog功能代码编写,该FIR为四阶的典型功能描述!-verilog
base_fir
- 使用verilog 写的FIR滤波器，里面并有matlab程序，是从altera官网下来的。。希望对大家游泳。-Use verilog to write the FIR filter, which have matlab and procedures, are down from the official website of the altera. . Everyone would like to swim.
fir8
- 用verilog编写的8阶串行fir滤波器-verilog vhdl fir
da_fir
- 分布式FIR程序Verilog语言，数字滤波器设计-DAfir
firfilterverilog
- 用VERILOG语言实现的FIR数字滤波器-VERILOG language with the FIR digital filter
verilogFir
- 基于Verilog+HDL的FIR数字滤波器设计与仿真 -Verilog+ HDL based on the FIR digital filter design and simulation
verilog的fir滤波器
- 实测可用，个人实现的fir滤波器，已经通过了modelsim仿真测试，